- Define or contribute to DFT design specifications and DFT strategy to meet test coverage, test time, and test cost targets; provide technical solutions for project requirements and issues.
- Perform and review DFT implementation and verification activities.
- Define and review DFT timing constraint (SDC) strategy, including test clocks and scan shift/capture requirements where applicable.
- Generate, validate, and debug test patterns for simulation and tester/ATE use.
- Mentor junior engineers; for Leader-level candidates, provide technical guidance and coordinate team activities.
- Collaborate with FE/BE and related teams to complete chip design and test activities within the project schedule.
Senior/Leader DFT Engineer
雇用形態
Engineer
経験
7+ years
職種
Senior/Leader DFT Engineer
勤務地
Tokyo - Japan
給与
Negotiable
応募締切
31/10/2026
Responsibilities
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering or Electronic Engineering.
- 7+ years of relevant experience in DFT, digital IC design, or a related area, including solid hands-on DFT experience.
- Strong hands-on experience in core DFT activities, including scan insertion/compression, ATPG, and pattern verification/debugging. For Leader-level candidates, hands-on experience across the full core DFT flow is required, including scan insertion/compression, ATPG, MBIST, boundary scan/JTAG, pattern verification/debugging, and DFT timing.
- Experience with one or more EDA tools from Synopsys, Cadence, Siemens EDA, or equivalent is preferred.
- Experience in related digital design activities such as RTL design, synthesis, STA, clock/reset design, or logic verification is a plus.
- Ability to communicate clearly and effectively within engineering teams and with global customers.
- For Leader-level candidates, experience in technical mentoring, task coordination, planning, or project ownership is preferred.
Benefits
Successful candidates will be part of a friendly, motivated and committed talent teams with various benefits and attractive offers:
- Competitive compensation package, aligned with capabilities and performance.
- Project bonuses when you join ODC (Offshore Development Center) projects
- Comprehensive benefits and welfare package (FPT Care, annual company trips, team building activities, annual health check-ups) in line with a large-scale corporation.
- Exposure to a diverse ecosystem across the semiconductor value chain, including PMIC, IP Solutions, Engineering Services, ATE & Packaging, Camera & Drone, and IoT Devices.
- Access to professional training and development programs within FPT Corporation.
- Working hours: 9:00 AM – 6:00 PM, Monday to Friday.
Submit your application online