FSEMI – Design Verification Engineer

Loại công việc
Engineer
Kinh nghiệm
1-2 years
Vị trí công việc
Physical Design Engineer
Địa điểm
Ho Chi Minh City, Vietnam
Mức lương
Negotiable
Hạn nộp hồ sơ
11/04/2026
Ứng tuyển ngay

Responsibilities

  • Build and optimize layout for chip blocks
  • Run timing analysis and fix setup/hold violations
  • Check and resolve DRC and LVS issues
  • Debug design issues during implementation stages
  • Prepare technical documentation and progress reports
  • Proactively learn and apply optimization techniques

Requirements

  • Bachelor’s degree in Electronics, Telecommunications, Computer Engineering, or related fields
  • Basic knowledge of VLSI, Digital IC Design, and Physical Design flow
  • Understanding of timing analysis and CMOS is a plus
  • Familiar with Linux; scripting (Python/Tcl) is an advantage
  • Good technical English reading skills
  • Strong logical thinking, attention to detail, teamwork mindset
  • No experience required; relevant projects/internships are a plus

Benefits

  • Competitive salary, performance bonus, 13th-month salary
  • Professional training in Physical Design and EDA tools
  • Opportunities to join international semiconductor projects
  • Modern, dynamic, high-tech working environment
  • Full insurance and periodic health check-ups
  • Clear career path from Fresher to higher levels
Chia sẻ
Ứng tuyển trực tuyến
Ứng tuyển bằng cách điền thông tin bên dưới
Ứng tuyển qua email
[email protected]
Submit your application online
Ứng tuyển trực tuyến
Ứng tuyển bằng cách điền thông tin bên dưới
Ứng tuyển qua email
[email protected]

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