LSI/FPGA Logic Design & Verification Engineer

Job type
Engineer
Experience
3+ years
Job Position
Senior LSI/FPGA Logic Design & Verification Engineer
Location
Japan
Salary
Up to 850 man/year
Application deadline
31/07/2026
Apply Now

Responsibilities

  1. RTL Design & Circuit Study:
  • Analyze system requirements and technical specifications to define hardware architecture.
  • Perform detailed design and develop high-quality RTL code using Verilog/VHDL.
  • Optimize design for performance, area, and power (PPA), specifically for image processing or communication protocols.
  1. Design Verification (DV):
  • Develop comprehensive Verification Specifications and Test Plans by extracting key features from design documents.
  • Architect and maintain verification environments (leveraging existing frameworks or building new ones).
  • Execute simulations, perform debugging, and analyze functional/code coverage to ensure “Zero-Bug” delivery.
  • Generate detailed verification reports and documentation.
  1. FPGA Implementation & Evaluation:
  • Perform synthesis, placement, and routing for FPGA targets.
  • Conduct hardware-in-the-loop (HIL) testing and evaluation on actual boards to verify real-time functionality.
  • Troubleshoot and resolve hardware-specific issues (timing violations, signal integrity).
  1. Technical Communication:
  • Directly collaborate with clients to clarify specifications and resolve technical roadblocks.

Requirements

  • Bachelor’s degree in Electronics, Electrical Engineering, Computer Engineering, or equivalent.
  • 3+ years of professional experience in RTL Design and Verification using Verilog or VHDL.
  • Understanding of hardware architectures for Image Processing or Communication Systems.
  • Knowledge in the full FPGA design flow (Simulation, Synthesis, Timing Analysis).
  • Experience in creating Test Plans and analyzing Coverage metrics.
  • Good English Communication.

Preferred Qualifications:

  • Hands-on experience with SystemVerilog and UVM (Universal Verification Methodology) for complex SoC verification.
  • Proficiency in C/C++ for hardware modeling, firmware integration, or scripting (Python/Perl/Tcl).
  • Experience with high-speed interface implementation and hardware debugging tools (Logic Analyzers, Oscilloscopes).

Benefits

Join a supportive and motivated team where your contributions truly matter. As part of our long-term assignment in Japan, you’ll enjoy a range of benefits designed to support both your professional and personal life:

  • Housing Allowance: Company-sponsored accommodation options or a monthly rental allowance.
  • Transportation Allowance: Reimbursement for commuting expenses.
  • Performance Bonuses: Based on your contributions and company performance.
  • Comprehensive Insurance: Full social and medical coverage in accordance with Japanese labor laws.
  • Home Visit Allowance: Financial support for travel back home.
  • Family Allowance: Additional benefits for employees and dependents in Japan.
  • Campaign Go Japan Support: One-time assistance based on role and family status.
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