DFT Engineer

• Execute RTL verification for SSD products at the Chip Top level, ensuring seamless integration between various IP modules (PCIe, NVMe, NAND Flash Controller, etc.). 
• Develop and maintain test scenarios using a combination of C language (for firmware-driven tests) and SystemVerilog/UVM (for protocol-level verification). 
• Utilize UVM-based environments to create complex test scenarios, debug RTL failures, and ensure functional correctness.

• Experience in circuit implementation using DFT tools (MBIST, SCAN, or BSD). (Tessent / DFT Compiler, etc.)
• Experience in pattern generation and logic verification. (Tessent / TetraMAX / VCS, etc.)
• Good communication skills and ability to work independently.
• Strong Japanese communication.

Nice to have:

• Able to write TCL scripts for circuit modification.
• Experience in equivalence checking. (Conformal LEC / Formality, etc.)
• Able to create timing specifications from circuit structures.
• Experience in timing verification. (PrimeTime / Tempus, etc.)
• Able to create scripts in Perl / C to improve work efficiency.

Join a supportive and motivated team where your contributions truly matter. As part of our long-term assignment in Japan, you’ll enjoy a range of benefits designed to support both your professional and personal life:

• Housing Allowance: Company sponsored accommodation options or a monthly rental allowance.
• Transportation Allowance: Reimbursement for commuting expenses.
• Performance Bonuses: Based on your contributions and company performance.
• Comprehensive Insurance: Full social and medical coverage in accordance with Japanese labor laws.
• Home Visit Allowance: Financial support for travel back home.
• Family Allowance: Additional benefits for employees and dependents in Japan.