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FSEMI – Design Verification Engineer
13-01-2025
01. Location(s) : Viet Nam ( Ha Noi, Da Nang, Ho Chi Minh), Japan, Korea.
02. Position Type : Employee.
03. Job Description :
As an ASIC RTL Verification engineer, You will work closely with design team to review the design spec and define detailed testplan.
04. Responsibilities :
- Develop & maintain verification environment for module and SOC level using UVM methodology.
- Create and debug test cases, IP verification.
- Write and review verification plan.
- Use assertion based verification to verify module or SOC level.
- Perform code coverage analysis on module and SOC level.
05. Requirements :
- Bachelor’s or Master’s degree in Electrical Engineering or Electronic Engineering.
- 3 years or above experience in the area of digital IC verification. Candidates with more years of experience may be considered for Senior Engineer position.
- Working experience from design to tape-out are essential
- Experience in system Verilog and UVM verification methodology
- Experience in using EDA tools from Cadence, Synopsys
- Knowledge and working experience in one or more of the following is a plus –
- Digital and DSP design
- Microprocessor / Graphics processor products
- Knowledge in connectivity technology such as USB, WIFI, Bluetooth, RFID, NFC, GPS, UART, SPI and I2C
- Embedded programming using C language
Nice to have:
- Good knowledge in digital design techniques and the state-of-the-art physical design methods.
- Solid fundamentals in IC design flow and ASIC concepts.
06. Benefit & Perks :
Successful candidates will be part of a friendly, motivated and committed talent teams with various benefits and attractive offers:
- Competitive salary in labor market.
- Eligible for project bonus when participating in Joint Venture/ODC (Offshore Development Center) projects.
- 13th month salary.
- “FPT care” health insurance provided by PIJICO and is exclusive for FPT employees.
Recharge and relax with paid annual summer vacation.
07. Contact :
For support and more information, please contact: