Join with Us

Let's Join Our Team and Create Innovative Value Together !

Warmly welcome to FPT Semiconductor .,JSC

FSEMI – STA Engineer


01. Location(s):Hồ Chí Minh

02. Position Type:Employee

03. Job Description:

The engineer will be required to perform the following ASIC design tasks:

  • Full chip and block level timing closure ownership throughout the entire project cycle (RTL, synthesis, and physical implementation).
  • Develop and maintain methodology and flows related to timing verification and closure.
  • Generation of block and full chip timing constraints.
  • Analyze timing reports and utilize scripting techniques to develop insights and drive rapid timing closure.
  • Work with physical design team to close and sign-off on timing.

04. Requirements:

  • At least 3+ years hands-on experience in ASIC timing constraints generation and timing closure.
  • Expertise in STA tools (such as Primetime) and methodologies for timing closure with a good understanding of OCV, noise and cross-talk effects on timing.
  • Familiarity with all aspects of timing closure of high-performance, mixed-signal SoCs in advanced process technology nodes (28nm and below).
  • Knowledge of timing corners/modes and process variations.
  • Knowledge of low-power techniques including clock gating, power gating and multi-voltage designs.
  • Proficient in scripting languages (Tcl and Perl).
  • Strong communication skills are a pre-requisite as the candidate will interface with a lot of different groups (e.g. digital design, verification, DFT, physical design, etc.).
  • Familiarity with RTL, synthesis, logic equivalence, DFT, floor-planning, and backend related methodology and tools.
  • Experience with CAD tools:
    • Static timing: Primetime or Tempus

05. Benefit:

  • Competitive salary and benefits package.
  • Opportunity for growth and advancement within the company.
  • Chance to work on innovative projects and make a meaningful impact in the automotive industry.

06. Contact:

    Send your CV