01. Location(s):Da Nang City, Ho Chi Minh City, Ha Noi City
02. Position Type:Employee
03. Job Description:
The engineer will be required to perform the following ASIC design tasks:
- Block level layout implementation and timing closure
- Static Timing/Crosstalk Analysis and timing closure
- Synthesis/Physical Synthesis
- Power/IR/EM analysis
- Physical verification (LVS/DRC/ERC)
- ECO implementation
04. Requirements:
- Understanding of chip layout/physical design concepts, methodologies and flows (i.e. floorplanning, power planning, power/IR/EM analysis, custom routing, pad ring etc.)
- Understanding of static timing and crosstalk/noise analysis and timing closure concepts, methodologies and flows.
- Understanding of RTL/gate synthesis concepts, methodologies and flows.
- Experience with the following areas of physical design:
- RTL/gate synthesis
- Floorplanning, place and route
- Static timing/crosstalk analysis
- Physical verification
- Power/IR/EM analysis
- Experience with following layout CAD tools:
- Synthesis: Design Compiler or Genus
- Place & Route: ICC2 or FusionCompiler or Innovus
- Static timing: Primetime or Tempus
05. Benefit:
- Competitive salary and benefits package.
- Opportunity for growth and advancement within the company.
- Chance to work on innovative projects and make a meaningful impact in the automotive industry.
06. Contact:
- For support and more information, please contact: